Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001
DOI: 10.1109/date.2001.915038 View full text |Buy / Rent full text
|
|

Abstract: This paper proposes a novel system-level power estimation methodology for electronic designs consisting of intellectual property (IP) components. Our methodology relies on analytical output and power macromodels of the IP blocks to estimate system dissipation without petforniing any simulation. We derive upper bounds on the estimation error of our methodology and demonstrate the relation of this error to the sensitivities of the macromodeling functions. For circuits without feedback, we give a siijj'icient con… Show more

Help me understand this report

Search citation statements

Order By: Relevance
Select...
0
14
0

Publication Types

Select...

Relationship

0
0

Authors

Journals